J Bell <emergent@eval-apply.com> wrote:
+---------------
| And reference counting is such a dog. It is bad enough that reference
| counting gives a performance hit proportional to use --- on a multithreaded
| system you have to sychronize reference count maintenance with
| EVERY THREAD ON EVERY USE! Now instead of just bumping an indirect
| integer, you call into the OS for a locked read-modify-write cycle every
| time you pass the pointer around.
+---------------
Not on all machines. For instance, MIPS architecture processors
[R4000 and later] have a pair of instructions -- "load link" and
"store conditional" (LL/SC) -- that can be used to do exclusive
access from user-mode only... and not just multi-threaded but also
multi-processor! And if you use the address of the heap object to
hash into a table of such locks, you can tune the space/speed tradeoff
however you like. Others processors such as the DEC Alpha, the IBM
RS6000, and the Power PC have similar capabilities.
[But don't take this as advocating ref counting, understand... ;-} ]
+---------------
| I suppose that locked bus cycles will eventually become commonplace
| in user code just for this purpose...
+---------------
Already are, on several commerical large SMP and CC/NUMA machines.
That's how you get near-linear scaleups [on some problems] with
dozens or hundreds of CPUs.
[Note: The locks are *not* implemented with "locked bus cycles"
exactly -- that would be way too slow! -- but with mechanisms
that provide equivalent effect.]
+---------------
| but it seems to me that if we wanted specialized hardware for GC,
| we would have been better off with LispM's.
+---------------
Yet another case where "general-purpose" caught up with (and surpassed?)
special-purpose (e.g, LispMs)...?
-Rob
-----
Rob Warnock, 7L-551 rpw3@sgi.com http://reality.sgi.com/rpw3/
Silicon Graphics, Inc. Phone: 650-933-1673 [New area code!]
2011 N. Shoreline Blvd. FAX: 650-933-4392
Mountain View, CA 94043 PP-ASEL-IA