Lieven Marchand <mal@bewoner.dma.be> wrote:
+---------------
| You have barrier methods, but these have to have hardware support
| like the Symbolics or Explorer had to be effective.
+---------------
Well, perhaps this might have been "obvious" at one time, but I suggest
that this old canard is worth re-examining in light of recent CPU speeds
and the continually worsening ratio of memory latency to CPU speed. Even
purely *software* read or write barriers may well be worth the overhead
these days, especially if it allows you to make effective *use* of a larger
number of CPUs.
Likewise, ISTR reading some papers [sorry, can't find the refs] that suggest
that explicit software card-marking write barriers (for generational copying
collectors) may now be *more* efficient than hardware-based write barriers,
if the latter are (1) only at page-sized granularity, and (2) require an
operating system trap on a write attempt of an unmarked page. A recommended
card size of 256 or 512 bytes sticks in my memory...
-Rob
-----
Rob Warnock, 41L-955 rpw3@sgi.com
Applied Networking http://reality.sgi.com/rpw3/
Silicon Graphics, Inc. Phone: 650-933-1673
1600 Amphitheatre Pkwy. PP-ASEL-IA
Mountain View, CA 94043