Ji-Yong D. Chung <virtualcyber@erols.com> wrote:
+---------------
| > But in general, Intel addressed the very limited number of registers in
| > their achitecture by making access to cached memory (in particular the
| > stack) about as fast as accessing registers.
| 
| Do you mean that a "stack," for Intel Pentiums, actually corresponds to
| a part of physical hardware other than RAM?
+---------------

No, the OP just meant that since the areas of memory the stack pointer
is pointing to [see below] will get accessed frequently, that they'll
likely still be in the D-cache, and thus re-accessing them will be "cheap".

Note that some generational garbage collectors also attempt to get
similar benefits for the youngest generation by using a fixed-location
"nursery" (new-object allocation area) and sizing it appropriately for
the (secondary) D-cache on the specific platform. Thus with respect to
keeping the cache "hot", using garbage collected heap for ephemeral
objects (e.g., intermediate results and procedure continuations) can
be (nearly) as efficient as a stack. [At least, so some claim. Others
counterclaim. Whoever's "right", the effect is still real & significant.]

+---------------
| at least for Intel chips, that there is no hardware stack, but that
| "stack" is just a data abstraction (which I'd assume, would map to RAM
| at some point during program execution).
+---------------

That's correct.


-Rob

-----
Rob Warnock, 31-2-510		rpw3@sgi.com
SGI Network Engineering		<URL:http://reality.sgi.com/rpw3/>
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